Xilinx, a leading provider of semi-conductor devices, has been testing two arrays on the 4850 Level. Called field programmable gate arrays (FPGA), the devices are used in such applications as 3-D video recording and movie projection, driver assistance, datacenters, cellular communication and networking, smart electricity grid management, avionics instrumentation, satellite instruments, and space vehicles like the Mars Rover.
FPGAs are designed and built using tens of millions of SRAM (static random-access memory) cells, which can be highly susceptible to single event upsets or SEUs. And Xilinx wants to know why that happens.
“We need to separate out the cosmic radiation effects from the effects of the alpha particle-producing package material of the FPGA," said John Latimer, senior director of Customer Quality Engineering. "Placing the arrays deep underground allows us to block the cosmic radiation and only measure SEU events that are caused by the package material itself."
SEUs occur when a neutron, proton, or alpha particle hits the silicon in the semiconductor. The collision leaves a trail of charged particles that, in some cases, can cause a transistor in a SRAM cell to change its logic state. If that happens, it can adversely affect the design programmed into the FPGA, potentially causing it to function improperly.
Before implementing the processes it employs today at Sanford Lab, Xilinx saw double the upset rate than what had been predicted. “We investigated and found we were using standard mold compound instead of the low-alpha compound we had ordered,” said Jeff Barton, Reliability Lab manager for Xilinx. “This is why it’s so critical that we test our packaging material.”
This year, Xilinx added an additional three arrays on the 4850 Level, all built using lead-free and ultra-low alpha emission materials.
“We expect to see almost no SRAM memory cell upsets due to packaging,” Barton said. “But we need to test three full arrays to get as much data as possible. The underground tests are the best way for us to get real-time alpha data and make sure our package material meets our targets.”
Barton said it likely will be 6 months to a year before the company has any statistically viable data; however, he is pleased with what they’ve seen so far.
“The expected upset rate is right in line with our computer simulations,” he said. “The results also match the initial testing we did on wafer fabricated test chips.” In that test, Xilinx used a piece of thorium foil to produce alpha particles.
“So far, the testing has been a resounding success,” he said.